Features

GENERAL

• First member of new USB-compatible generation of Windows 95/98/ME/NT/2000/XP/2003/XP64 based ELNEC universal programmers built to meet the strong demand of the developers community for the fast and reliable universal programmer.
• Supports all kinds of types and silicon technologies of today and tomorrow programmable devices without family-specific module. You have freedom to choose the optimal device for your design. Using built-in in-circuit serial programming ( ISP ) connector, the programmer is able to program ISP capable chips in circuit.
• BeeProg isn't only a programmer, but also a tester of TTL/CMOS logic ICs and memories. Furthermore, it allows generation of user-definable test pattern sequences .
• Provides very competitive price coupled with excellent hardware design for reliable programming. Probably best "value for money" programmer in this class.
• Very fast programming due to high-speed FPGA driven hardware and execution of time-critical routines inside of the programmer. At least fast than competitors in this category, for many chips much faster than most competitors. As a result, when used in production this one-socket-programmer waits for an operator, and not the other way round.
• BeeProg interfaces with the IBM PC 486 compatible or higher, portable or desktop personal computers through USB (2.0/1.1) port or any standard parallel (printer) port . Programmer also supports IEEE1284 (ECP/EPP) high-speed parallel port. Support of both USB/LPT port connection gives you the choice to connect the BeeProg programmer to any PC, from latest notebook to older desktop without USB port.

HARDWARE

• FPGA based totally reconfigurable 48 powerful TTL pindrivers provide H/L/pull_up/pull_down and read capability for each pin of socket. Advanced pindrivers incorporate high-quality high-speed circuitry to deliver signals without overshoot or ground bounce for all supported devices. Pin drivers operate down to 1.8V so you'll be ready to program the full range of today's advanced low-voltage devices.
• The programmer performs device insertion test (wrong or backward position) and contact check (poor contact pin-to-socket) before it programs each device. These capabilities, supported by overcurrent protection and signature-byte check help prevent chip damage due to operator error.
• The selftest capability allow to run diagnostic part of software to thoroughly check the health of the programmer.
• Built-in protection circuits eliminate damage of programmer and/or programmed device due to environment or operator failure. All the inputs of the BeeProg programmer, including the ZIF socket, connection to PC and power supply input, are protected against ESD up to 15kV.
• BeeProg programmer performs programming verification at the marginal level of supply voltage, which, obviously, improves programming yield, and guarantees long data retention.
• Various socket converters are available to handle device in PLCC, SOIC, PSOP, SSOP, TSOP, TSSOP, TQFP, QFN (MLF), SDIP, BGA and other packages.

SOFTWARE

• Programmer is driven by an easy-to-use control program with pull-down menu, hot keys and on-line help. Selecting of device is performed by its class, by manufacturer or simply by typing a fragment of vendor name and/or part number.
• Standard device-related commands (read, blank check, program, verify, erase) are boosted by some test functions (insertion test, signature-byte check), and some special functions (autoincrement, production mode - start immediately after insertion of chip into socket).
• All known data formats are supported. Automatic file format detection and conversion during loading of file.
• The rich-featured auto-increment function enables one to assign individual serial numbers to each programmed device - or simply increments a serial number, or the function enables one to read serial numbers or any programmed device identification signatures from a file.
• The software also provide a many information about programmed device. As a special, the drawing of all available packages are provided. The software provide also explanation of chip labelling (the meaning of prefixes and suffixes at the chips) for each supported chip.
• The software provide a full information for ISP implementation: Description of ISP connector pins for currently selected chip, recommended target design around in-circuit programmed chip and other necessary information.
• The remote control feature allows to be PG4UW software flow controlled by other application ? either using .BAT file commands or using DLL file.
  DLL file, examples (C/PAS) and manual are part of standard software delivery.
• Jam files of JEDEC standard JESD-71 are interpreted by Jam Player . Jam files are generated by design software which is provided by manufacturer of respective programmable device. Chips are programmer in-ZIF or through ISP connector (IEEE 1149.1 Joint Test Action Group (JTAG) interface).
• VME files are interpreted by VME Player. VME file is a compressed binary variation of SVF file and contains high-level IEEE 1149.1 bus operations. VME files are generated by design software which is provided by manufacturer of respective programmable device. Chips are programmer in-ZIF or through ISP connector (IEEE 1149.1 Joint Test Action Group (JTAG) interface).
• Multiple devices are possible to program and test via JTAG chain: JTAG chain (ISP-Jam) or JTAG chain (ISP-VME).
• Attaching of more BeeProg programmers to the same PC (through USB port) is achieved a , which support as many chips, as are supported by BeeProg programmer and without obvious decreasing of programming speed . It is important to know, there is a concurrent multiprogramming - each programmer works independently and each programmer can program different chip, if necessary.

Programming speed

Notes:

• It is important to know, we always use random numbers pattern for programming speed testing. Some our competitors use "sparse" pattern, where only few non-Blak data are programmed or are there are used data with only few 0 bits (FE, EF, etc.). This cheating approach can "decrease" programming time considerable. If you plan to compare, ask always which pattern they use.
• The programming speed depends on PC speed only slightly.
• If the programmer attached to PC through LPT port, the programming might take longer.

SOFTWARE

• Algorithms: only manufacturer approved or certified algorithms are used. Custom algorithms are available at additional cost.
• Algorithm updates: software updates are available regulary, approx. every 2 weeks, free of charge.
• Main features: revision history, session logging, on-line help, device and algorithm information.

Device operations

• standard:
  • intelligent device selection by device type, manufacturer or typed fragment of part name
  • automatic ID-based selection of EPROM/Flash EPROM
  • blank check, read, verify
  • program
  • erase
  • configuration and security bit program
  • illegal bit test
  • checksum
  • interprete the Jam Standard Test and Programming Language (STAPL), JEDEC standard JESD-71
  • interprete the VME files compressed binary variation of SVF files
• security
  • insertion test, reverse insertion check
  • contact check
  • ID byte check
• special
  • production mode (automatic start immediately after device insertion)
  • auto device serial number increment
  • statistic
  • count-down mode

Buffer operations

• view/edit, find/replace
• fill/copy, move, byte swap, word/dword split
• checksum (byte, word)
• print

File load/save

• no download time because programmer is PC controlled
• automatic file type identification/recognition
  

  Supported file formats

  • unformatted (raw) binary
  • HEX: Intel, Intel EXT, Motorola S-record, MOS, Exormax, Tektronix, ASCII-SPACE-HEX,, ASCII HEX
  • Altera POF, JEDEC (ver. 3.0.A), eg. from ABEL, CUPL, PALASM, TANGO PLD, OrCAD PLD, PLD Designer ISDATA, etc.
  • JAM (JEDEC STAPL Format), JBC (Jam STAPL Byte Code), STAPL (STAPL File) JEDEC standard JESD-71
  • VME (ispVME file VME2.0/VME3.0)